1. Field of the Invention
The present invention relates generally to the field of semiconductor technology and, more particularly, to an improved photomask layout pattern that is suited for the transfer of H-shaped micro patterns without the need of employing optical proximity correction (OPC).
2. Description of the Prior Art
In semiconductor manufacturing processes, in order to transfer an integrated circuit layout onto a semiconductor wafer, the integrated circuit layout is first designed and formed as a lithography pattern. Then, the lithography pattern is transferred to form a photo mask pattern. The photo mask pattern is then proportionally transferred to a photoresist layer positioned on the semiconductor wafer.
As a design pattern of an integrated circuit becomes smaller and due to a resolution limit of an optical exposure tool, an optical proximity effect occurs during the photolithographic process performed for transferring the photo mask pattern with higher density. The optical proximity effect causes defects when transferring the photo mask pattern, such as residue of an assistant feature next to a right-angle main feature, right-angle corner rounding, line end shortening, and line width increasing/decreasing.
To avoid the above-mentioned problems of the optical proximity effect, resolution enhancement technology (RET) and optical proximity effect correction (OPC) are applied. The OPC process uses a computer aided design (CAD) with exposing parameters and a calculation software to correct the original photomask pattern of the original photomask layout and create a corrected photomask layout. The corrected photomask layout is then input into a computer to produce a photomask.
Please refer to FIG. 1 and FIG. 2. FIG. 1 is an enlarged top view of an exemplary H-shaped layout pattern on a mask, and FIG. 2 illustrates an after-develop-inspect (ADI) pattern that is transferred from the mask of FIG. 1 to a photoresist layer through conventional lithographic processes. As shown in FIG. 1, the shaded region is opaque chrome area, while the blank region is transparent area. In the original designed H-shaped layout pattern 1, no OPC auxiliary patterns are added. However, after lithography, the ADI pattern transferred to the photoresist layer has some defects including pull back of the end of the line-shaped pattern 2 and tapered bottleneck on the line shaped space pattern 3 adjacent to the H-shaped layout pattern 1. The dashed line indicated in FIG. 2 denotes the ideal position of the distal end of the line-shaped pattern 2. Compared to the ideal position, the deviation may be about 50 nm at each side.
Conventionally, OPC methods are employed to solve the above-mentioned problems. As shown in FIG. 3, for example, hammerhead patterns 4 are added into the H-shaped layout pattern 1 to alleviate the pull back of the end of the line-shaped pattern 2. However, the hammerhead patterns 4 cannot solve the tapered bottleneck on the line shaped space pattern 3. Further, the conventional OPC methods are time-consuming and expensive.